DaedalusX64 SVN r777

August 27th, 2012, 21:25 Posted By: wraggster

DaedalusX64 SVN r777 is compiled. DaedalusX64 is a N64 Emulator for PSP. DaedalusX64 is the continuation of the original Daedalus PSP port by StrmnNrmn. It is a GPL Open Source project.

DaedalusX64 SVN Changelog:
r767
[=>] Merged from Dev branch:
Rev 675 - Salvy
[!] Simplified branch type functions (Compiler was adding a bound checking, also reorder Enum to allow other optimizations)
[-] Removed svnversion.h (this created automatically anyways)
Rev 676 - Corn
[!] Dynarec: Improved performance of float compare and branching (BC1F/BC1T) (speedup)
[!] Dynarec: Removed exception check after interpreter calls from dynarec (speedup)
Rev 677 - Salvy
[!] Simplified branch type even more
Rev 678 - Corn
[!] Made BC1T/BC1F branching more robust (fixes RR64)
Rev 679 - Salvy
[+] Added known value optimizations to SLTx ops (32bit only!) in dynarec (they are disabled since I'm not sure is worth to handle them)
r768
[=>] Merged from Dev branch:
Rev 680 - Corn
[!] Dynarec implemented LD/SD (load/store 64bit integer)
[!] Dynarec partly implemented LDC1/SDC1 (load/store 64bit float)
[!] Dynarec if source reg is SP, ADDIU wont do sign extension.
[!] Dynarec Skip sign extending CFC1
Rev 681 - Corn
[!] reverted ADDIU optimization (CBFD BSOD)
Rev 682 - Corn
[!] Proper double handling in interpreter (and some clean up)
[!] Reverted PIF/DMA changes (Incompatible with older SaveStates)
Rev 683 - Salvy
[!] Bring back changes to PIF/DMA changes (This is was the proper way, PJ64 are compatible now)
[!] Added workaround to support older savestates created after rev 715
Rev 684 - Corn
[+] Added INS/EXT and CFC1 OpCodes to AssemblyWriterPSP
[!] Dynarec: Optimized float compare (no branch)
[!] Small fix/optimization to PIF swizzle
Rev 685 - Corn
[+] Dynarec: Added DADDI/DADDIU, DSRA32 and DSLL32
Rev 686 - Salvy
[!] Fixed regression in Aerogauge
[!] Optimization in XORI and ORI
Rev 687 - Corn
[!] Aerogauge fix
[!] small optimization in floats branching when fast mode fails
r769
[=>] Merged from Dev branch:
Rev 688 - Salvy
[!] Optimization in ADDIU & ANDI (Dynarec)
Rev 689 - Salvy
[!] Opps typo!
Rev 690 - Salvy
[-] Removed optimization in ANDI (since we zero'd the hi reg regardless)
[!] Optimization in OR
Rev 691 - Salvy
[!] Reverted optimization for ADDIU
Rev 692 - Corn
[+] New Speed up option: Dynarec Doubles Optimizations (advanced menu) when enabled dynarec compiles code to simulate doubles with floats
Rev 693 - Corn
[!] added dynarec simulated float caching in FPU and some clean up
Rev 694 - Salvy
[+] Implemented blit (code taken from The TriEngine)
[!] Use blitting to support large textures (since the PSP hardware can only handle up to 512x512)
Worms - Armageddon is now playable
Rev 695 - Salvy
[!] Use more complex blit algorithm from latest version of TriEngine (fixes large texture used in StarSoldier (640x320)
r770
[=>] Merged from Dev branch:
Rev 696 - Corn
[+] Added more float/double conversion to dynarec doubles optimization
Rev 697 - Corn
[!] Reverted MFC1 optimization, sign ext. is needed (broke DKR)
[!] Various cleanup/bugfixes to SimDoubles
Rev 698 - Salvy
[!] Made more robust optimizations in GenerateOR (we'll check more throughly if we need hi bits)
[!] New optimization in GenerateOR when rs/rt is R0 and register is known
Rev 699 - Corn
[!] Better compatibility using Doubles Opt. (fixes a few games)
Rev 700 - Salvy
[!] optimization in GenerateADD/U when rs/rt is R0 and register is known
[!] optimization in GenerateAND when high bits aren't needed
Rev 701 - Salvy
[!] Improved previous optimization in GenerateADDU
Rev 702 - Salvy
[!] Don't check hi part of known value when probing if high bits aren't needed (Fixes text being missing in OOT)
[!] Check if register is mapped as 32bit, this will improve detection when high bits aren't needed (Experimental!) (Note: This will be removed soon, the logic is completely wrong!)
Rev 703 - Corn
[!] Small optimation in dynarec simdouble loading
[!] rearrangement in Dynarec options
r771
[=>] Merged from Dev branch:
Rev 704 - Corn
[!] Additional fixes/optimizations to dynarec sim-doubles (SSV works now as well as most other games)
Rev 705 - Corn
[!] fixed audio pitch when using PAL ROMs (tnx re4thewin to point that out)
Rev 706 - Salvy
[!] Simplify IgnoreHi, It'll only check if gate logic is non negative
[!] Fixed Duck Dodgers not longer working with IgnoreHi optimization in GenerateAND
Rev 707 - Salvy
[-] Removed IgnoreHi optimization in GenerateAND (Breaks SW - Racer)
Rev 708 - Salvy
[+] Added compile flag to disable checking if logic is 32bit in dynarec
[!] More aggressive checking if logic is 32bit
Rev 709 - Corn
[!] Fix proper N64 to PSP scaling for large textures(see Worms, still don't work for 4:3 unscaled screen)
r772
[=>] Merged from Dev branch:
Rev 710 - Salvy
-Ignored
Rev 712 - Salvy
[!] Fixed blitting not scaling properly (we'll use the simple version of blit as well for now)
Rev 712 - Salvy
-Ignored
Rev 713 - Wally
Updated uCode files for case sensitive OS's
Rev 714 - Salvy
-Ignored
Rev 715 - Salvy
[!] Rewrote logic to check if 32bit in dynarec
[-] Removed checking if register was mapped as 32bit
[!] GenerateADDU : Sign extend when rt/rs is 0
Rev 716 - Corn
[!] optimization of Patch_strchr() (OSHLE)
[+] some comments
Rev 717 - Corn
[+] Added LWL and LWR OP codes to Dynarec
[!] Only use real doubles in dynarec if forced from ROM hacks
[!] Some clean up and removal of Dynarec test code
Rev 718 - Corn
[!] Fixed bug that never enabled LoopOpt. (LoopOpt still only works in a few games like SM64)
[!] Cleaned up BSOD text dump (shows when registers are pointing in RDRAM)
[+] added EXT & INS in disassembly and fixed MSB/LSB order
r773
[=>] Merged from Dev branch:
Rev 719 - Corn
[!] Made LoopOpt is more stable
Rev 720 - Corn
[!] Reworked exception/BSOD information screen and log
Rev 721 - Corn
[!] Dynarec: reimplemented LWL & LWR OPs with much simpler code (faster)
[!] Dynarec: implemented SWL & SWR OPs
[!] Framelimiter now averages with 4 frames (converge faster)
Rev 722 - Corn
[!] Removed redundant checks for operations on hi part of CPU regs in DynaRec
Rev 723 - Corn
[!] fix for CBFD using LWR op
[!] fix for CBFD using AND op
Rev 724 - Salvy
[!] SDC1,LDC1,LDL,LDR,COP0 (except ERET) don't need PC, removed entries which are already handled in dynarec too
r774
[=>] Merged from Dev branch:
Rev 725 - Corn
[!] Optimizing AND/OR/XOR for when one of the hi regs are known and =0, small speedup
Rev 726 - Salvy
[!] Improve detection when hi reg isn't needed in GenerateOR
Rev 727 - Salvy
[!] Improved previous optimization when register is known and is zero (they are basically a NOP), also added another opt for AND
Rev 728 - Corn
[!] reverted and corrected logic in previous rev
Rev 729 - Corn
[!] Added possibility to scroll ASM when PSP BSODs (require #undef DAEDALUS_SILENT)
Rev 730 - Corn
[!] CPUControl is now 32bit (from 64bit)
Rev 731 - Wally
[~] Fix SVNVersion so it compiles all times.
[~] Tidy up Text_Area Commands into new file UIArea.h (Saves 3KB)
Rev 732 - Wally
[<=] Reverted previous commit, broke several parts of the GUI
r775
[=>] Merged from Dev branch:
Rev 733 - Salvy
[!] FPUControl is now 32bit
[!] Some small optimizations in OSHLE
Rev 734 - Salvy
[!] FPU reg is now 32bit
Rev 735 - Corn
[!] Some cleanup after 64bit to 32bit register changes
Rev 736 - Salvy
[~] Fixed debug build
Rev 737 - Corn
[!] Added showing handled speed hacks (with OP code) in dynarec (undef DAEDALUS_SILENT)
[!] moved some code under DAEDALUS_SILENT to DAEDALUS_DEBUG_CONSOLE and DAEDALUS_DEBUG_DISPLAYLIST
Rev 738 - Corn
[!] It is now possible to map emulated CPU/FPUregs to psp scratchpad (disabled)
[!] Debug_console is now possible to compile without silent flag
[!] Adjustments to dynarec/traces parameters
r776
[=>] Merged from Dev branch:
Rev 739 - Salvy
[!] Rewrote N64 memory initialization
[!] Simplified ReadRom/WriteValue_Cartridge (FlashRam read/write is more robust too)
[!] Use attribute const for ReadAddress (hints compiler to optimize further)
[~] Lotsa of clean ups in Memory.cpp etc
Rev 740 - Salvy
[!] Games that use EPAK should work again
Rev 741 - Corn
[!] Fixed some dynarec constants that slowed down War Gods and PD
Rev 742 - Salvy
[+] Add support for games that write to ROM (Bug's Life and Toy Story 2 boot now)
[!] Use fast memory read for DPC, AI, and SI reg
[!] Removed memory bound checking (paranoid checks..this was already disabled in release mode anyways)
[!] Several clean ups in memory.cpp
Rev 743 - Salvy
[!] Do not allocate memory for RD_REG4,RD_REG4,and DPS_REG (They are unused anyways)
[!] Simplified mapping Rom region (It'll use new memory mapping, as a result will respect Rom boundary as well)
Rev 744 - Salvy
[!] Simplify a few more things in Memory.cpp
Rev 745 - Salvy
[!] Reduce PIF RAM usage from 2048 bytes to 64 (It can be reduced more, but need to do some tests first)
[!] Enabled SI hack for Cruisn' USA (it boots now)
[~] Some small clean ups
Rev 746 - Salvy
[!] Reduced PIF RAM even more, now is only 16 bytes
[!] Pre-swap when writing to PIF RAM, also simplified MemoryUpdatePIF
Rev 747 - Salvy
[!] Optimized memory pointer table optimization (faster, and no longer computes the address twice when table is invalid) (Note: Dynarec is broken! Need to update DynaRecStubs.s)
[~] Removed "fast" memory write table (pointer table was already optimizing out) (saves memory too!)
[!] Increased maximum of clipped verts (Fixes Mortal Kombat 4) (Thnx jeanpave for reporting it)
[-] Reverted previous commit (I assumed wrongly that memory alloc was done in word size.. thnx Corn for pointing out!)
Rev 748 - Salvy
[!] Made DAEDALUS_ALIGN_REGISTERS compatible with previous changes (Might be a good idea to give it another shot since we have decreased register pressure lately)
[~] Forgot to twiddle address in previous commit
[+] Add back svnversion.h (Still needed when compiling Daedalus in cygwin)
Rev 749 - Corn
[!] Fixed dynarec access to broken pointer from previous rev
Rev 750 - Corn
[!] Optimized branch delay slots in dynarec service routines
r777
[=>] Merged from Dev branch:
Rev 751 - Salvy
[=>] Merged from Daedalus js port:
[+] Added new hash for microcodes
Rev 752 - Corn
[!] Removed optimization of LBU for banjo while using dynarec mem opt.
[!] Changed to a simpler hash for texture indexing.
Rev 753 - Corn
[!] Abort texture generation if palette address is NULL for palette textures
[!] small optimization of hash function.
Rev 754 - Salvy
[-] Bye bye murmur2 hash
[!] Made slow memory access compatible with recent changes
[+] Added DKR64 hack which makes DK64 boot (This is disabled since we ignore IMEM transfers for speed which is required for DK64)
Rev 755 - Salvy
[!] Moved check if palette address is NULL for palette textures (Now is only check when trying to load a palletized texture)
[~] Removed unused tables from convert image
Rev 756 - Salvy
[!] Increase both MAX_VERTICES and MAX_CLIPPED_VERTS (Fixes Flying Dragon crashing)
[!] Fixed debug build
[~] Silenced some annoying asserts

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